Page addressing

Memory address translation takes place at run time. Reading a word from memory involves translating a virtual or logical address, consisting of a page number and offset, into an actual physical address, consisting of a frame number and offset. This process will make use of the Page Table entries.

Logical address Physical address

If the system used 16 bits then it could utilise memory in this fashion:

15 10 0

Page no Displacement

with this set up the system would have 32 pages (2⁵ ) each with 2048 bytes (2 ¹¹)

Example If a logical address of 0010100000101010 was encountered this will represent offset 42 on page 5. The Page table would be accessed to see the Mapping of page 5.

logical address

Physical address Page Table

Static paging:

· No external fragmentation

· Fixed size pages

· Internal fragmentation – only on last page

· Non- contiguous memory (page table)

Paging

Lets say memory is only 1024 bytes = 2¹⁰ address locations.

A page frame size is 256 byte 2⁸ .

Logical address 00,0000,0000

page0

00,1111,1111

01,0000,0000

page1

01,1111,1111

10,0000,0000

page2

10,1111,1111

11,0000,0000

page3

11,1111,1111

Page Table where is logical address 00, 0000,00010 where is 11 ,0000,1111

0000,0000 frame0 1111,1111 0000,0000 0000,0010 frame1 1111,1111 0000,1111 frame2 frame3